74ALVC164245DL NXP SSOP48全新原装 进口

74ALVC164245DL

1。一般说明

The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS

该74alvc164245是一种高性能，低功耗，低电压，CMOS硅栅

device, superior to most advanced CMOS compatible TTL families.

装置，优于最先进的CMOS兼容的TTL家庭。

The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring

该74alvc164245是16位（双八路收发器具有双电源转换）

non-inverting 3-state bus compatible outputs in both send and receive directions. It is

非反相三态总线兼容的输出的发送和接收方向。它是

designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply

为了在混合3 V 3 V和5 V和5 V电源总线之间的接口

environment.

环境。

This device can be used as two 8-bit transceivers or one 16-bit transceiver.

此设备可作为两个8位收发器或一个16位收发器。

The direction control inputs (1DIR and 2DIR) determine the direction of the data ?ow.

方向控制输入（1DIR和2DIR）确定数据流的方向?。

nDIR (active HIGH) enables data from nA ports to nB ports. nDIR (active LOW) enables

NDIR（高电平有效）使数据从港口到港口的NA NB。NDIR（低电平）使

data from nB ports to nA ports. The output enable inputs (1OE and 2OE), when HIGH,

从港口到港口的NB数据Na。输出使能输入（1OE和2OE），当高，

disable both nA and nB ports by placing them in a high-impedance OFF-state. The nB

禁用NA和NB端口放置在关闭一个高阻抗状态。NB

ports interface with the 5 V bus. The nA ports interface with the 3 V bus.

端口接口与5 V总线。Na端口接口与3 V总线。

In suspend mode, when one of the supply voltages is zero, there will be no current ?ow

在暂停模式，当一个电源电压为零，就不会有电流?OW

from the non-zero supply towards the zero supply. The A-outputs must be set 3-state and

从非零对零电源供应。该a-outputs必须设置三态和

the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCCB ≥ VCCA (except

在一个总线的电压必须小于Vdiode（典型的0.7 V）。VCCB≥VCCA（除

in suspend mode).in suspend mode).

在暂停模式）

74ALVC164245DL 图片